238000006011 modification reactions Methods 0.000 description 1. 238000006731 degradation reactions Methods 0.000 description 2. 230000015556 catabolic process Effects 0.000 description 2. 230000001360 synchronised Effects 0.000 claims description 7. 238000001914 filtration Methods 0.000 claims description 7. 238000004364 calculation method Methods 0.000 claims description 7. Publication of US20100097052A1 publication Critical patent/US20100097052A1/en Application granted granted Critical Publication of US7977936B2 publication Critical patent/US7977936B2/en Status Active legal-status Critical Current Adjusted expiration legal-status Critical Links Assignors: LILLESTOLEN, KIRK A., BAUER, RONALD P., SALOIO, JAMES, JR. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.) Filing date Publication date Application filed by Hamilton Sundstrand Corp filed Critical Hamilton Sundstrand Corp Priority to US12/252,603 priority Critical patent/US7977936B2/en Assigned to HAMILTON SUNDSTRAND CORPORATION reassignment HAMILTON SUNDSTRAND CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Original Assignee Hamilton Sundstrand Corp Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.) Bauer Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.) Active, expires Application number US12/252,603 Other versions US20100097052A1 Fpga synchro resolver pdf#
Google Patents Resolver interface and signal conditionerĭownload PDF Info Publication number US7977936B2 US7977936B2 US12/252,603 US25260308A US7977936B2 US 7977936 B2 US7977936 B2 US 7977936B2 US 25260308 A US25260308 A US 25260308A US 7977936 B2 US7977936 B2 US 7977936B2 Authority US United States Prior art keywords sine cosine input excitation converter Prior art date Legal status (The legal status is an assumption and is not a legal conclusion. Google Patents US7977936B2 - Resolver interface and signal conditioner
Up to six on-board 2.US7977936B2 - Resolver interface and signal conditioner. 47 Hz to 4,000 Hz (for 47 Hz to 10 kHz or 20 kHz, contact factory). 0.015° converter grade stimulus accuracy. 0.005° instrument grade stimulus accuracy. 0.005° instrument grade measurement accuracy. 
Multiple functions on a single-slot VXI card.The 65CS4 is ideally suited for defense, commercial aerospace, and industrial applications.
Each daughter card, either instrument grade or embedded grade, can be populated with S/D, D/S, or REF modules, depending on the grade type. The internal modular DSP design of this multichannel, embedded grade instrument features a motherboard that can be populated with up to two daughter cards. The board incorporates up to four Synchro/Resolver measurement channels and up to four instrument-grade Synchro/Resolver simulation channels, or up to eight embedded grade Synchro/Resolver simulation channels that can be used independently and/or simultaneously. NAI’s 65CS4 is a Synchro/Resolver Simulation & Measurement Instrument on a single-slot VXI board. 65CS4 VXI Synchro/Resolver Simulation & Measurement
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